This invention generally relates to triggers for digitizing instruments and, more particularly, to a digital trigger for a digitizing instrument in which multiple analog-to-digital converters are employed to provide a higher sampling rate than is possible with a single analog-to-digital converter.
A digitizing instrument such as a digital oscilloscope or transient digitizer must have a sampling rate that is at least twice as fast as the analog signal being sampled in order to accurately determine the nature of the signal. This sampling is done by one or more analog-to-digital converters (ADCs). The rate at which a single converter can digitize an analog signal (known as conversion rate), however, may be too slow for fast signals such as those in the gigahertz range. To facilitate higher sampling rates, a digitizing instrument may employ a number of analog-to-digital converters to operate on successive samples of the signal in interleaved fashion. In this arrangement, a multiphase clock typically generates separate clock signals over a clock period. Each signal clocks a separate ADC during a different phase of the multiphase clock, effectively multiplying the sampling rate.
Prior triggers for digitizing instruments employing multiple, interleaved ADCs have been analog in nature, comparing the analog input signal directly to an analog trigger threshold level. While such triggers are adequate, they suffer from a number of drawbacks when used with digitizing instruments. Additional circuitry, with the attendant space, power, cost, and reliability is required. Moreover, the trigger point on the analog signal may not correspond to the trigger point on the equivalent digitized signal, causing the instrument to trigger at an undesired point.
As an alternative to an analog trigger, a digital trigger may be employed that compares the digitized output signal of each analog-to-digital converter against a digitized trigger threshold level. A digital trigger addresses the drawbacks of an analog trigger, but to date their use in interleaved systems has sacrificed trigger point resolution (accuracy) in return. It is difficult to tell when a trigger point on an input signal occurred in a clock period, because the digitized signals from each converter must be synchronized to a system clock before they can serve as a trigger. The clock period itself can still be identified by the presence of a trigger signal, but not the individual phase thereof.